1. Field of the Invention
The present application relates to database management systems that implement buffer memory management processes to reduce main memory transaction times. More particularly the present application provides a cache memory management process that predicts pages in the memory that may be accessed in the near future and maintains the pages in the cache.
2. Description of the Related Art
Many database management systems use high speed buffer memory, known as buffer cache, to increase the speed of database transactions between a central processing unit (CPU) and disk storage and increase the overall speed of the data processing system. Typically, data is transferred from disk to main memory in pages or blocks of data. The data transferred typically includes data requested by the CPU and additional data, sometimes known as prefetched data, which is determined to be data that is most likely to be requested by the CPU soon.
Usually the total size of the database on disk is significantly larger than amount of memory available in the CPU system so that the cache eventually becomes full. As a result, the database management system has to decide which pages in the cache are to be removed and which are maintained.
Due to the temporal locality of database cache accesses, most pages that were accessed in the recent past are very likely to be accessed again the near future. Thus, conventional database management systems use a least recently used (LRU) memory management process, where the page least recently accessed is removed from the cache.
However, not all database cache pages have the same access characteristics. For example, some pages are frequently accessed over a long period of time, while other pages are accessed a number of times within a short period after the first access and then are not accessed again for a long time.
In multiple user environments more than one transaction may access some or all of the same pages in the cache. Thus, if the LRU memory management process is used in multiple user environments, pages may be replaced in the cache after one transaction has accessed the pages but before another transaction accesses some or all of the pages. In this instance, the CPU would then have to retrieve the pages from main memory again, thus increasing memory transaction times. For optimum performance of the cache, the page whose next access time is the farthest away in the future is the page that should be replaced.